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The 2nd version, named "Cascades", was based on the Pentium III "Coppermine" core. The "Cascades" Xeon made use of a 133 MT/s entrance facet bus and comparatively tiny 256 kB on-die L2 cache resulting in Nearly the exact same capabilities given that the Slot one Coppermine processors, which were being effective at dual-processor operation althoug